top of page

Virtual Hensel I Arithmetic:

Verification of Correctness

SciSci Inventions, No. 7

November 2025

BoydNuHeadShot III.jpeg

James Douglas Boyd

Founder, CEO

Diagnostic Cover.png

Invention

Verification of correctness of Virtual Hensel I arithmetic logic unit arithmetic.

Institutions

▣ SciSci Research, Inc. (サイサイ・リサーチ)

▣ Future Computing (未来コン), SciSci's high-performance computing project

Discipline

High-performance computing (HPC)

Topics: Virtual Hensel, FC-3-2025 encodings, 2AALUs, exact arithmetic, verification

Topics

 

Verification of Virtual Hensel I Arithmetic

▣ This report demonstrates a verification of the correctness of arithmetic as performed by the 2-adic arithmetic logic unit (2AALU) of the Virtual Hensel I. The demonstration is shown for L_FC blocks, T_FC blocks, and R_FC blocks in FC-3-2025 encodings.

Executive Summary

In hindsight, the Hensel CPU project, which began in May 2025, was nonetheless possible thanks to several academic visits to international mathematics research institutions, during which Boyd accrued some knowledge about p-adic analysis within the context of arithmetic geometry, analytic number theory, and representation theory. These include the Research Institute for Mathematical Sciences (RIMS; 数理解析研究所) in Kyoto, Japan; the Institute for Pure and Applied Mathematics (IMPA; Instituto Nacional de Matemática Pura e Aplicada) in Rio de Janeiro, Brazil, and the Nesin Mathematics Village (Nesin Matematik Köyü) in Şirince, Türkiye. 

© SciSci Research, Inc. 2025, All Rights Reserved​​

bottom of page