Hensel CPU Arithmetic Logic Units:
Circuit Design for Exact
2-adic Arithmetic
SciSci Inventions, No. 4
September 2025
James Douglas Boyd
Founder, CEO
Invention
Arithmetic logic unit design for the Hensel CPU
Institutions
▣ SciSci Research, Inc. (サイサイ・リサーチ)
▣ Future Computing (未来コン), SciSci's high-performance computing project
Discipline
High-performance computing (HPC)
Topics: Combinational logic, circuit design, carry addition, FC-2-2025 instruction computation, scalability, parallelization.
Topics
Combinational Logic of Exact Computing
▣ The Hensel CPU architecture performs exact arithmetic on 2-adic numbers. Because the coefficients of 2-adic expansions are either 0 or 1, operands can be encoded in bits as finite lists of 2-adic expansion coefficients, and computations can be performed with standard MOSFET technology with nothing so exotic as Boolean logic gates. This report details the circuit design for binary (i.e., two-operand) addition.
The Combinational Logic of Load-Store
▣ The combinational logic for exact 2AALU arithmetic (written in terms of Boolean functions, corresponding to gates in the 2AALU circuits) is given for length-five operands (i.e., operands compatible with the Virtual Hensel I.)
Executive Summary
In hindsight, the Hensel CPU project, which began in May 2025, was nonetheless possible thanks to several academic visits to international mathematics research institutions, during which Boyd accrued some knowledge about p-adic analysis within the context of arithmetic geometry, analytic number theory, and representation theory. These include the Research Institute for Mathematical Sciences (RIMS; 数理解析研究所) in Kyoto, Japan; the Institute for Pure and Applied Mathematics (IMPA; Instituto Nacional de Matemática Pura e Aplicada) in Rio de Janeiro, Brazil, and the Nesin Mathematics Village (Nesin Matematik Köyü) in Şirince, Türkiye.