Starting the Exact Computing Revolution
Future Computing is SciSci's high-performance computing project, established to replace floating-point computing with exact computing.
It's flagship product will be the Hensel CPU, the world's first exact computing CPU.
What is Exact Computing?
Exact computing means CPU arithmetic without error, so, beyond floating-point.
Since the 1940's, CPUs have used floating-point arithmetic, which is only approximate.
Floating-point approximation errors are small, but grow unsustainably as compute scales. Reducing error with floating-point requires more bits, and its thus expensive.
Future Computing is developing the first CPU to perform exact arithmetic.
No approximation. No error. Exact computing for massive scalability and performance.
How Can Arithmetic be Made Exact?
The mathematics of exact arithmetic is already known.
The problem with floating-point isn't related to technology; the issue is that floating-point numbers are real numbers (i.e., in ℝ), which don't have unique representations.
p-adic numbers, at the core of contemporary number theory, serve as an alternative to real numbers, and have exact representations.
Exact arithmetic packages based on p-adic numbers already exist in Magma, etc.
The next step is to deliver exact arithmetic to the hardware level. Future Computing uses 2-adic numbers, which can be encoded in bits and thus be computed with standard MOSFET technology.
Timeline
July 2025
Future Computing begins, publishes first report on the Hensel CPU, an architecture for exact computing.
August 2025
Future Computing publishes its technical preview of Virtual Hensel I, a virtual machine that emulates the Hensel CPU architecture. As a quickly built proof-of-principle, the Virtual Hensel I can perform exact arithmetic on >50,000 numbers.
September 2025
Future Computing publishes technical reports on the Hensel CPU's 2-adic arithmetic logic units (2AALUs) and load-store architecture, with emphasis on circuit design and combinational logic of exact arithmetic.
Invention No. 5
RIXA
A RISC Instruction Set Architecture for Exact Computing
Topics: LSU combinational logic, circuit tree design, relationship between χ-modification of operands by LSU loaders and Φ-perturbations of circuit tree paths, relationship to hop calculus and π-sequence passing, parallelization and scaling.
Invention No. 3
Load-Store Architecture
A circuit-level description of how operands are handled in the processor register cluster for efficient, exact arithmetic
Topics: LSU combinational logic, circuit tree design, relationship between χ-modification of operands by LSU loaders and Φ-perturbations of circuit tree paths, relationship to hop calculus and π-sequence passing, parallelization and scaling.
Invention No. 4
Arithmetic Logic Units
A circuit-level description of how exact arithmetic is performed
Topics: Combinational logic, circuit design, carry addition, FC-2-2025 instruction computation, scalability, parallelization.
Invention No. 1
Hensel CPU
An original computing architecture design for doing exact arithmetic, rather than floating-point
Topics: 2-adic expansions, FC 1-2025 standard for encoding 2-adic expansion coefficients, processor architecture, 2-adic arithmetic logical units (2AALUs), FC 2-2025 parallelized instruction standard, arithmetic parallelization, optimality of parallelization with respect to non-Archimedean distance, error-detection and fault-tolerance, supercomputing (i.e., zetascale) prospects and a exact operations per second (XOPS) benchmark.
.png)
Invention No. 2
The Virtual Hensel
The first emulation on the Hensel CPU architecture and a proof-of-principle of exact, 2-adic computing
Topics: χ-IDs and χ-address matching for distributed load-store, FC-3-2025 encoding for χ-IDs, loading operations, decompoundment and recompoundment of operands with respect to χ-IDs, algorithmic generation of FC-3-2025 encodings, hop calculus visualization, operand capacity scalability, arithmetic reach scalability, cost-savings of exact computing.